Building the Future of AI Hardware at the Intersection of Silicon and Strategy
I lead Architecture & ASIC Operations at Etched, where we're designing transformer-specific chips that fundamentally reimagine AI inference. My path from McKinsey strategy to Citadel's Office of the COO to semiconductor leadership reflects a belief that the most impactful innovations happen when deep technical expertise meets strategic execution.
The Journey: My career has been driven by a fascination with complex systems and a bias toward building things that matter. I started at Harvard studying statistics and computer science, drawn to the elegant mathematics underlying machine learning and probability. After stints in consulting at McKinsey and high-stakes operations at Citadel Securities' Office of the COO, I found my calling at the frontier of AI hardware—where the next decade of computing will be won or lost.
What I Do: Today, I orchestrate chip development programs at Etched, managing everything from architecture decisions to vendor partnerships to team building. I work at the intersection of hardware engineering, software optimization, and business strategy—coordinating across silicon design, verification, physical design, packaging, and go-to-market teams. Whether it's defining 15-month development timelines, evaluating backend partners, or optimizing memory hierarchies for transformer workloads, I thrive on the complexity of bringing cutting-edge ASICs from concept to production.
What Drives Me: I'm obsessed with the challenge of making AI inference radically more efficient. Today's AI infrastructure is constrained by general-purpose hardware that wasn't designed for transformers. I believe specialized silicon—thoughtfully architected and flawlessly executed—can unlock orders of magnitude improvement in performance and cost. Beyond the technology, I'm passionate about building organizations that can execute at the highest level, attracting exceptional talent, and creating the operational discipline required to compete in the semiconductor industry.
Managing comprehensive ASIC development programs from architecture to tape-out, including 15-month timelines, multi-team coordination across Architecture/Frontend/Backend/DFT/Package, and complex vendor relationships. Driving technical decisions on memory systems, processing architectures, and silicon implementation that will define next-generation AI inference performance.
Led extensive hiring initiatives for senior architect roles, ASIC program managers, and specialized engineering positions. Developed comprehensive interview frameworks, screening processes, and organizational scaling strategies. Experience growing teams from 30 to 160+ in high-stakes technical environments.
At Citadel Securities' Office of the COO, drove strategic initiatives directly impacting business units managing billions in trading volume. Performed complex performance analysis, defined operational KPIs, and partnered with executive leadership on the firm's most critical decisions. Bridged the gap between strategy and execution in one of the world's most sophisticated trading operations.
I'm always interested in conversations about AI hardware, semiconductor development, technical leadership, or building exceptional organizations. Whether you're working on similar challenges, exploring opportunities in the space, or just want to geek out about chip architecture—let's talk.
Currently open to: